XPLL Cascade

Versal Adaptive SoC Clocking Resources Architecture Manual (AM003)

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1.5 English

XPLLs from up to three adjacent banks can be setup in a cascade configuration using the Advanced IO wizard. In the following figure, where a triplet is shown, a dedicated cascade path (shown by the red arrow) exists from CLKOUT0 of the center XPLL (master XPLL) to XPLLs located at adjacent XPIO banks (slave XPLL). A negative phase shift is applied to align the CLKOUTPHY on the slave XPLL with the CLKOUTPHY on the master XPLL. For additional information on the configuration and related timing analysis, see Advanced I/O Wizard LogiCORE IP Product Guide (PG320) and Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010).

Figure 1. Cascading of XPLLs in Adjacent Banks