Frequency Synthesis and Deskew

Versal Adaptive SoC Clocking Resources Architecture Manual (AM003)

Document ID
AM003
Release Date
2023-05-16
Revision
1.5 English

Frequency synthesis and deskew options are available in the Versal device MMCM/PLL primitives. Use the examples provided in MMCM Use Models for all options, including PLL use models.