AXI Stream Loopback Example Design - 4.0 English

QDMA Subsystem for PCI Express Product Guide (PG302)

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4.0 English
Figure 1. AXI4-Stream Loopback Example Design

The example design above is generated when the DMA Interface Selection option is set to AXI Stream with Completion in the Basic tab. In this mode, the AXI-ST H2C interface is connected to a data checker, and the AXI-ST C2H interface is connected to data generator and CMPT interface is connected to Completion generator module. But this example design can also be used as a streaming loopback design.

Set the Example design register C2H_CONTROL_REG (0x008) bit[0] to 1 to turn this example design into a streaming loopback design. The example design then takes H2C streaming packets and loops them back to the C2H Streaming interface. Completion packets are generated from the loopback design.