AXI4-Lite Slave ports can be used to access QDMA Queue space registers (QDMA_TRQ_SEL_QUEUE_PF (0x18000) and QDMA_TRQ_SEL_QUEUE_VF (0x3000)).
Signal Name | I/O | Description |
---|---|---|
s_axil_awaddr[31:0] | I | This signal is the address for a memory mapped write to the DMA Queue space registers from the user logic. |
s_axil_awvalid | I | The assertion of this signal means there is a valid write request to the address on s_axil_awaddr. |
s_axil_awuser[12:0] | I |
[12:8]: Reserved [7:0]: Function number |
s_axil_awprot[2:0] | I | Protection type. This port is not being used. |
s_axil_awready | O | Slave write address ready. |
s_axil_wdata[31:0] | I | Slave write data. |
s_axil_wstrb[3:0] | I | Slave write strobe. |
s_axil_wvalid | I | Slave write valid. |
s_axil_wready | O | Slave write ready. |
s_axil_bvalid | O | Slave write response valid. |
s_axil_bresp[1:0] | O | Slave write response. |
s_axil_bready | I | Save response ready. |
Signal Name | I/O | Description |
---|---|---|
s_axil_araddr[31:0] | I | This signal is the address for a memory mapped read to the DMA Queue space from the user logic. |
s_axil_arprot[2:0] | I | Protection type. This port is not being used. |
s_axil_arvalid | I | The assertion of this signal means there is a valid read request to the address on s_axil_araddr. |
s_axil_aruser[12:0] | I |
[12:8]: Reserved [7:0]: Function number |
s_axil_arready | O | Slave read address ready. |
s_axil_rdata[31:0] | O | Slave read data. |
s_axil_rresp[1:0] | O | Slave read response. |
s_axil_rvalid | O | Slave read valid. |
s_axil_rready | I | Slave read ready. |