QDMA_TRQ_SEL_QUEUE_PF (0x18000) - 4.0 English

QDMA Subsystem for PCI Express Product Guide (PG302)

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Table 1. QDMA_TRQ_SEL_QUEUE_PF (0x18000) Register Space
Register Address Description
QDMA_DMAP_SEL_INT_CIDX[2048] (0x18000) 0x18000-0x1CFF0 Interrupt Ring Consumer Index (CIDX)
QDMA_DMAP_SEL_H2C_DSC_PIDX[2048] (0x18004) 0x18004-0x1CFF4 H2C Descriptor Producer index (PIDX)
QDMA_DMAP_SEL_C2H_DSC_PIDX[2048] (0x18008) 0x18008-0x1CFF8 C2H Descriptor Producer Index (PIDX)
QDMA_DMAP_SEL_CMPT_CIDX[2048] (0x1800C) 0x1800C-0x1CFFC C2H Completion Consumer Index (CIDX)

There are 2048 Queues, each Queue will have more than four registers. All these registers can be dynamically updated at any time. This set of registers can be accessed based on the Queue number.

  • Queue number is absolute Qnumber [0 to 2047].
  • Interrupt CIDX address = 0x18000 + Qnumber*16
  • H2C PIDX address = 0x18004 + Qnumber*16
  • C2H PIDX address = 0x18008 + Qnumber*16
  • Write Back CIDX address = 0x1800C + Qnumber*16

For Queue 0:

  • 0x18000 correspond to QDMA_DMAP_SEL_INT_CIDX
  • 0c18004 correspond to QDMA_DMAP_SEL_H2C_DSC_PIDX
  • 0x18008 correspond to QDMA_DMAP_SEL_C2H_DSC_PIDX
  • 0x1800C correspond to QDMA_DMAP_SEL_CMPT_CIDX

For Queue 1:

  • 0x18010 correspond to QDMA_DMAP_SEL_INT_CIDX
  • 0c18014 correspond to QDMA_DMAP_SEL_H2C_DSC_PIDX
  • 0x18018 correspond to QDMA_DMAP_SEL_C2H_DSC_PIDX
  • 0x1801C correspond to QDMA_DMAP_SEL_CMPT_CIDX

For Queue 2:

  • 0x18020 correspond to QDMA_DMAP_SEL_INT_CIDX
  • 0c18024 correspond to QDMA_DMAP_SEL_H2C_DSC_PIDX
  • 0x18028 correspond to QDMA_DMAP_SEL_C2H_DSC_PIDX
  • 0x1802C correspond to QDMA_DMAP_SEL_CMPT_CIDX