Building the Device Binary

The PL kernel code is written in C++ or RTL, and is built by compiling the kernel code into a Xilinx object (XO) file, and linking the XO files into a Xilinx binary (.xclbin) file, as shown in the following figure.

When targeting an AMD Versal™ AI Core device, the hardware can include an AI Engine graph application that is also written in C++, compiled with the aiecompiler tool, and results in a libadf.a file that can also be linked into the device binary as shown below.

Figure 1. Device Build Process

The process, as outlined above, has two steps:

1. Build the Xilinx object files from the kernel source code.
   • For C, C++ kernels, the v++ -c command compiles the source code into Xilinx object (XO) files. Multiple kernels are compiled into separate XO files.
   • For RTL kernels, the AMD Vivado™ IP packager command produces the XO file to be used for linking. Refer to Packaging RTL Kernels for more information.
   • You can also create kernel object (XO) files working directly in the AMD Vitis™ HLS tool as described in the Vitis HLS User Guide (UG1399).
2. After compilation, the v++ -l command links one or multiple kernel objects (XO), together with the hardware platform XSA file, to produce the Xilinx binary .xclbin file.