Identifying the Clocks Related to Each Port - 2021.1 English

Versal ACAP Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2021-07-26
Version
2021.1 English

Before defining the I/O delay constraint, you must identify which clocks are related to each port. You can identify the clocks using the methods described in the following sections.