Packaging RTL Kernels - 2021.1 English - UG1387

Versal ACAP Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2021-07-26
Version
2021.1 English

You can create Vitis PL kernels from RTL code or a Vivado IP block using the Vitis IP packager, as explained in RTL Kernel Development Flow in the Application Acceleration Development flow of the Vitis Unified Software Platform Documentation (UG1416).