RLDRAM 3 Memory Data Signals Point-to-Point

UltraScale Architecture PCB Design User Guide (UG583)

Document ID
UG583
Release Date
2023-11-14
Revision
1.27 English

This Figure shows the RLDRAM 3 memory data signals point-to-point routing.

Figure 2-68:      Data Signals Point-to-Point Routing

X-Ref Target - Figure 2-68

ug583_c2_33.jpg

Table: RLDRAM 3 Memory Impedance, Length, and Spacing Guidelines for Data Signals shows the RLDRAM 3 memory impedance, length, and spacing guidelines for data signals.

Table 2-78:      RLDRAM 3 Memory Impedance, Length, and Spacing Guidelines for Data Signals

Parameter

L0 (Device Breakout)

L1 (Main PCB)

L2 (DRAM Breakout)

Units

Trace type

Stripline

Stripline

Stripline

dq impedance Z0

50±10%

39±10%

50±10%

W

Trace width (nominal)

4.0

6.0

4.0

mil

Trace length (nominal)

0.0~0.8/1.2(1)

0.0~4.0

0.0~0.25

inches

Spacing in byte (minimum)

4.0

8.0

4.0

mil

Spacing byte to byte (minimum)

4.0

20

4.0

mil

dq to dk/qk spacing (minimum)

4.0

20

8.0

mil

Spacing to other group signals (minimum)

8.0

30

30

mil

Maximum PCB via count

2

Notes:

1.See item 2 in General Memory Routing Guidelines.