In applications that use AC coupling for interfacing the data converters, DAC outputs should be AC coupled using a 100 nF capacitor in package size 0402 or smaller. ADC can be AC coupled, if necessary, and should be 100 nF in package size 0402 or smaller. This Figure illustrates a representative placement of the AC coupling capacitors in a typical ADC interfacing circuit.
Capacitor values smaller than 100 nF can be used for AC coupling assuming the application does not need to operate to very low frequencies. The customer can simulate the S parameter model of the data converter with the AC coupling capacitor to establish the minimum size capacitance if necessary. The minimum AC coupling capacitance should not be below 100 pF.
DC coupling is also supported for the ADC and DAC. For DAC DC coupling, there are two constraints. First, the DAC requires the correct effective termination resistance of 100W differential. Second, the DAC outputs should be biased at the correct DC common mode point. The DC common mode point is 2.1V using DAC_AVTT = 3.0V with RFSoC Gen 3 or RFSoC DFE. It is possible to have an RFSoC Gen 1 compatibility mode but the VOP feature would not be available. Using RFSoC Gen 1 compatibility mode, the common mode point is 1.9V using DAC_AVTT = 2.5V. Refer to Zynq UltraScale+ RFSoC RF Data Converter LogiCORE IP Product Guide (PG269) [Ref 17] for details and compatibility mode. It is also possible to enable DAC DC coupling with reduced VOP range using DAC_AVTT = 3.0V on RFSoC Gen3/DFE. See Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926) [Ref 5] for VOP range specification.
For ADC DC coupling, the ADC VCM output should be coupled with a 100 nF capacitor in package size 0402 or smaller. In addition, the input common-mode level should be taken from the ADC VCM output signal.
Note: The ADC common mode has changed from Gen 1 to Gen 3 from 1.25V to 0.7V. The ADC common mode is designed to drive a high impedance load of ³ 10 KW. If a lower impedance load is required, a buffer should be used on the common mode signal.
A typical ADC DC coupling configuration is shown in This Figure.
Note: The VCM output buffer is only enabled in DC coupled mode.