Using fly-by topology, each address and command signal is routed to drop by each memory device and connect to its corresponding pin. (This Figure).
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Table: RLDRAM 3 Memory Fly-by Impedance, Length, and Spacing Guidelines for Address, Command, and Control Signals shows the RLDRAM 3 memory fly-by impedance, length, and spacing guidelines for address, command, and control signals.
|
Parameter |
L0 (Device Breakout) |
L1 |
L2 (DRAM Breakout) |
L3 |
L4 |
Units |
|---|---|---|---|---|---|---|
|
Trace type |
Stripline |
Stripline |
Stripline |
Stripline |
Stripline |
– |
|
Single-ended impedance Z0 |
50±10% |
36±10% |
50±10% |
50±10% |
39±10% |
W |
|
Trace width |
4.0 |
7.0 |
4.0 |
4.0 |
6.0 |
mil |
|
Trace length |
0.0~0.8/1.2(1) |
0.0~4.0 |
0.0~0.25 |
0.35~1.05 |
0~1.0 |
inches |
|
Spacing in address, command, and control (minimum) |
4.0 |
8.0 |
4.0 |
8.0 |
8.0 |
mil |
|
Spacing to clock signals (minimum) |
8.0 |
20 |
8.0 |
20 |
20 |
mil |
|
Spacing to other group signals (minimum) |
8.0 |
30 |
30 |
30 |
30 |
mil |
|
Maximum PCB via count |
6 |
– |
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Notes: 1.See item 2 in General Memory Routing Guidelines. |
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