Implementation Configuration - 2023.1 English

The syn.vivado commands configure the Vivado synthesis and implementation runs used to derive resource utilization and timing estimates. These settings generally do not affect the RTL created for the HLS component, but can affect the example hardware design used for estimates.

vivado.clock

Override the HLS clock constraint used in the Vivado out-of-context run for determination of timing analysis. This does not affect the output IP or XO files.

vivado.clock=37

vivado.flow

Run the Vivado flow for synthesis only (syn), or for implementation (impl). Running synthesis will be faster than running implementation, but will lack some of details of the implementation run. The default setting is impl.

vivado.flow=syn

Tip: This is different from the flow_target option that defines the target as being either the Vitis kernel flow or the Vivado IP flow.

vivado.impl_strategy

Specify a Vivado synthesis or implementation strategy. Strategy names can be found in Defining Implementation Strategies in the Vivado Design Suite User Guide: Implementation (UG904). This is used for resource utilization and timing analysis and will not affect the output files.

vivado.impl_strategy=Performance_Explore

vivado.max_timing_paths

Specify the max number of timing paths to report when the timing is not met in the Vivado synthesis or implementation.

vivado.max_timing_paths=12

vivado.optimization_level

Vivado optimization level, sets other vivado_* options. This will not apply to IP/XO output. The choices are 0, 1, 2, 3. This only applies for report generation and will not apply to the exported IP. The default setting is 0.

vivado.optimization_level=2

vivado.pblock

Specify a PBLOCK range to use during implementation for reporting purposes.

vivado.pblock={SLICE_X8Y105:SLICE_X23Y149}

vivado.phys_opt

Run Vivado physical optimization at the specified implementation stage. The choices are no optimization (none), placement optimization (place), routing optimization (route), or both placement and routing (all). This option only applies to the implementation run used to generate resource and timing estimates.

vivado.phys_opt=route

vivado.report_level

Specif the report level for Vivado synthesis and implementation run. The valid values and the associated reports are:

• 0: Post-synthesis utilization. Post-implementation utilization and timing.
• 1: Post-synthesis utilization, timing, and analysis. Post-implementation utilization, timing, and analysis.
• 2: Post-synthesis utilization, timing, analysis, and failfast. Post-implementation utilization, timing, and failfast. This is the default setting.

vivado.report_level=1

vivado.rtl

Specifies RTL language (verilog/vhdl) to select in Vivado flow.

vivado.rtl=vhdl

vivado.synth_design_args

Specifies arguments for the Vivado synth_design command. Available synth_design arguments can be found in the Vivado Design Suite Tcl Command Reference (UG835)

vivado.synth_design_args=arg1 arg2

vivado.synth_strategy

Specifies a Vivado synthesis strategy to use when generating the example design to use for resource and timing estimates. Specific synthesis strategies can be found in Vivado Design Suite User Guide: Synthesis (UG901).

vivado.synth_strategy=Synthesis_Defaults