C-Simulation Configuration - 2023.1 English

Vitis Unified IDE and Common Command-Line Reference Manual (UG1553)

Document ID
UG1553
Release Date
2023-07-17
Version
2023.1 English

The csim options apply to the C-simulation process used to validate the C/C++ language for the design. Refer to Verifying Code with C Simulation for more information.

csim.O
Enables optimizing compilation which eliminates debug constructs. The default is false and compilation is done in debug mode to enable debugging.
csim.O=true
csim.argv
Specifies an argument list for the behavioral test bench. The specified <arg> will be passed to the main() function in the C test bench.
csim.argv=arg1 arg2
csim.clean
Enables clean build. The default is false. Without this option the design will compile incrementally.
csim.clean=true
csim.code_analyzer
Enable code analysis and interactive GUI report.
csim.code_analyzer=0
csim.ldflags
Specifies the options passed to the linker for simulation. This option is typically used to pass include path information or library information for the C/C++ test bench.
csim.ldflags=ldExample
csim.mflags
Provides for options to be passed to the compiler for C simulation. This is typically used to speed up compilation.
csim.mflags=mExample
csim.profile
Enable the creation of the Pre-Synthesis Control Flow.
csim.profile=true
csim.setup
When this option is specified, the simulation binary will be created in the csim directory of the current HLS component, but simulation will not be executed. Simulation can be launched later from the compiled executable. The default is false, and simulation is run after setup is complete.
csim.setup=true