Building for Hardware Emulation - 2023.1 English

Vitis Unified IDE and Common Command-Line Reference Manual (UG1553)

Document ID
UG1553
Release Date
2023-07-17
Version
2023.1 English

For hardware emulation and hardware, each of the elements must be compiled for hardware simulation. This means the libadf.a file that is included in the v++ --link command line must be compiled for the target=hw_emu as explained in Compiling and Simulating AI Engine Components. The HLS components must be synthesized using v++ -c --mode hls as described in Creating HLS Components.

To link the different elements of the System project together for hardware emulation the command-line will look as follows:

v++ --target hw_emu --platform xilinx_vck190_base_202310_1 --link \
--config ./aie_sys_design/hw_link/system.cfg ./aie_sys_design_mm2s/mm2s/mm2s.xo \
./aie_sys_design_s2mm/s2mm/s2mm.xo ./aie_sys_design_polar_clip/polar_clip/polar_clip.xo \
./aie_sys_design_aie/build/hw/libadf.a -o binary_container.xsa

Where:

  • --target specifies the target for the build
  • --platform specifies the platform to build against
  • --link specifies the hardware linker process for the v++ command
  • --config specifies a config file with the linking directives for the build
  • kernel.xo specifies PL kernels (mm2s, s2mm, polar_clip...) generated using the v++ -c --mode hls command as shown above
  • libadf.a specifies an AI Engine component compiled for aiesimulator/hardware target using the v++ -c --mode aie command
  • binary_container.xsa specifies the output file from the v++ --link command as described in Integrating the Application with the Vitis Tools

The contents of a configuration file can vary, but the example uses the following commands in the system.cfg file for the hardware linker:

debug=1
save-temps=1
temp_dir=binary_container
report_dir=binary_container/reports
log_dir=binary_container/logs

[advanced]
misc=solution_name=binary_container

[connectivity]
stream_connect=mm2s_1.s:ai_engine_0.DataIn1
stream_connect=ai_engine_0.polar_clip_out:polar_clip_1.in_sample
stream_connect=polar_clip_1.out_sample:ai_engine_0.polar_clip_in
stream_connect=ai_engine_0.DataOut1:s2mm_1.s
nk=mm2s:1:mm2s_1
nk=s2mm:1:s2mm_1
nk=polar_clip:1:polar_clip_1

After the hardware linker has completed, you will need to run the v++ --package command to build the boot files for the embedded system, and to convert the .xsa output of the linker to the .xclbin file needed to load the Versal device. The command to run the package process is as follows:

v++ --package --platform xilinx_vck190_base_202310_1 --target hw_emu \
--config ./aie_sys_design/package/package.cfg \
--package.sd_file ./aie_sys_design_host/build/hw/emconfig.json \
--package.sd_file ./aie_sys_design/build/hw_emu/aie_sys_design_Launch_hw_emu/run_app.sh \
--package.sd_file ./aie_sys_design_host/build/hw/aie_sys_design_host \
--package.out_dir package_aie_debug --temp_dir=package_aie_debug.build \
./aie_sys_design/build/hw_emu/hw_link/binary_container.xsa \
./aie_sys_design_aie/build/hw/libadf.a \
-o binary_container.xclbin

The package.cfg file referenced by the v++ --package command looks like the following:

temp_dir=package.build
save-temps=1

[package]
out_dir=./package
kernel_image=/proj/xbuilds/2023.1_daily_latest/internal_platforms/sw/versal/xilinx-versal-common-v2023.1/Image
rootfs=/proj/xbuilds/2023.1_daily_latest/internal_platforms/sw/versal/xilinx-versal-common-v2023.1/rootfs.ext4
sd_dir=../../../data
enable_aie_debug=true

To run the hardware emulation build you must use the launch_hw_emu.sh script produced by the package process. Refer to Running Emulation on an Embedded Processor Platform for more information.

./launch_hw_emu.sh