Building for Software Emulation - 2023.1 English

Vitis Unified IDE and Common Command-Line Reference Manual (UG1553)

Document ID
UG1553
Release Date
2023-07-17
Version
2023.1 English
Note: The Vitis IDE uses x86 simulation for software emulation of both Data Center accelerator cards, and Embedded Processor platforms. This is known as the PS on X86 method.

For software emulation, each of the elements must be compiled for x86 simulation. This means the libadf.a file that is included in the v++ --link command line must be compiled for the x86sim target as explained in Compiling and Simulating AI Engine Components.

Also, because C synthesis for HLS components creates a Vitis kernel (.xo) file for hardware emulation and hardware design flows, you must separately compile each HLS component for use in software emulation using the v++ -c command as follows:

v++ -c -g -k polar_clip --target sw_emu --platform xilinx_vck190_base_202310_1 \
-I./aie_sys_design_common/src --temp_dir ./polar_clip/sw_emu \
-o ./polar_clip/sw_emu/polar_clip.xo ./src/polar_clip.cpp 

To link the different elements of the System project together for software emulation the v++ --link command will include the libadf.a and the kernel.xo files generated for the x86 simulation target. The command-line will look as follows:

v++ --target sw_emu --platform xilinx_vck190_base_202310_1 --link \
--config ./aie_sys_design/hw_link/system.cfg \
./mm2s/sw_emu/mm2s.xo ./s2mm/sw_emu/s2mm.xo ./polar_clip/sw_emu/polar_clip.xo \
./aie_sys_design_aie/build/x86sim/libadf.a -o binary_container.xsa

Where:

  • --target specifies the target for the build
  • --platform specifies the platform to build against
  • --link specifies the hardware linker process for the v++ command
  • --config specifies a config file with the linking directives for the build
  • kernel.xo specifies PL kernels (mm2s, s2mm, polar_clip...) generated using the v++ -c command as shown above
  • libadf.a specifies an AI Engine component compiled for x86sim target
  • binary_container.xsa specifies the output file from the v++ --link command as described in Integrating the Application with the Vitis Tools

The contents of a configuration file can vary, but the example uses the following commands in the system.cfg file for the hardware linker:

debug=1
save-temps=1
temp_dir=binary_container
report_dir=binary_container/reports
log_dir=binary_container/logs

[advanced]
misc=solution_name=binary_container

[connectivity]
stream_connect=mm2s_1.s:ai_engine_0.DataIn1
stream_connect=ai_engine_0.polar_clip_out:polar_clip_1.in_sample
stream_connect=polar_clip_1.out_sample:ai_engine_0.polar_clip_in
stream_connect=ai_engine_0.DataOut1:s2mm_1.s
nk=mm2s:1:mm2s_1
nk=s2mm:1:s2mm_1
nk=polar_clip:1:polar_clip_1

After the hardware linker has completed, you will need to run the v++ --package command to build the boot files for the embedded system, and to convert the .xsa output of the linker to the .xclbin file needed to load the Versal device. The command to run the package process is as follows:

v++ --package --platform xilinx_vck190_base_202310_1 --target sw_emu \
--save-temps --temp_dir package --package.out_dir package \
./aie_sys_design/build/sw_emu/hw_link/binary_container.xsa \
./aie_sys_design_aie/build/x86sim/libadf.a -o binary_container.xclbin
 

After building the System project for software emulation, you can run it using the following command:

./host_application ./package/binary_container.xclbin