Packaging RTL Kernels - 2024.2 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2024-12-18
Version
2024.2 English

You can create Vitis PL kernels from RTL code or a Vivado IP block using the Vitis IP packager, as explained in RTL Kernel Development Flow in the Data Center Acceleration using Vitis (UG1700).