Packaging RTL Kernels - 2024.1 English

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2024-06-19
Version
2024.1 English

You can create Vitis PL kernels from RTL code or a Vivado IP block using the Vitis IP packager, as explained in this link in the Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393).