Optimize Hierarchy for Functional and Timing Debug - Optimize Hierarchy for Functional and Timing Debug - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2026-07-22
Version
2026.1 English

As discussed earlier in this section, keeping the critical path within the same hierarchical boundary is helpful in debugging and meeting timing requirements. Keep related signals in the same hierarchy for functional debug and modification purposes. The related signals can be probed and modified with relative ease. Signal names optimized by synthesis are easier to trace. This applies when they are contained within a single level of hierarchy.