Opening the Synthesized Design - 2024.1 English

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2024-06-19
Version
2024.1 English

The first steps after synthesis are to read the netlist from the synthesized design into memory and apply design constraints. You can open the synthesized design in various ways, depending on the flow used. For more information, see this link in the Vivado Design Suite User Guide: Implementation (UG904).