Defining Interfaces - 2023.2 English

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2023-11-15
Version
2023.2 English

The primary difference between the Vivado IP flow and the Vitis kernel flow in Vitis HLS is the handling of the design interfaces. In the Vivado IP flow, interfaces must be explicitly managed by the designer, whereas Vitis HLS automatically infers AXI interfaces (memory mapped AXI4, AXI4-Lite, AXI4-Stream) in the Vitis kernel flow. Before starting a project with either flow, the developer needs to be familiar with how Vitis HLS handles interfaces, as explained in this link in the Vitis HLS User Guide (UG1399).