QDR-IV Debug Signals Used in Vivado Design Suite Debug Feature - 1.0 English

Versal ACAP Soft QDR-IV SRAM Memory Controller LogiCORE IP Product Guide (PG355)
Document ID
PG355
Release Date
2021-12-03
Version
1.0 English

The following table shows the QDR-IV debug signals.

Table 1. QDR-IV SRAM Debug Signals Used in Vivado Design Suite Debug Feature
Signal Signal Width Signal Description
init_calib_complete [0:0] Signifies the status of calibration.

1’b0 = Calibration not complete

1’b1 = Calibration completed successfully
cal_status [31:0] Contains information of completed and failed calibration stages.