Test Bench - 1.0 English

Versal ACAP Soft QDR-IV SRAM Memory Controller LogiCORE IP Product Guide (PG355)

Document ID
PG355
Release Date
2021-12-03
Version
1.0 English

This section contains information about the test bench provided in the Vivado® Design Suite.

The Memory Controller is generated along with a simple test bench to verify the basic read and write operations. The stimulus contains 16 consecutive writes followed by 16 consecutive reads for data integrity check.