Customizing and Generating the Core - 1.0 English

Versal ACAP Soft QDR-IV SRAM Memory Controller LogiCORE IP Product Guide (PG355)
Document ID
PG355
Release Date
2021-12-03
Version
1.0 English

This section includes information about using Xilinx® tools to customize and generate the core in the Vivado® Design Suite.

Note: This IP is not compatible with Vivado IP integrator.

You can customize the IP for use in your design by specifying values for the various parameters associated with the IP core using the following steps:

  1. Select the IP from the IP catalog.
  2. Double-click the selected IP or select the Customize IP command from the toolbar or right-click menu.

For details, see the Vivado Design Suite User Guide: Designing with IP (UG896) and the Vivado Design Suite User Guide: Getting Started (UG910).

Figures in this chapter are illustrations of the Vivado IDE. The layout depicted here might vary from the current version.