RF-ADC Electrical Characteristics

Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926)

Document ID
DS926
Release Date
2024-05-31
Revision
1.13 English
Table 1. RF-ADC Electrical Characteristics for ZU2xDR Devices
Parameter Comments/Conditions 1 Min Typ 2 Max Units
Analog Inputs
Resolution 12 Bits
Sample Rate Devices using quad ADC tile channel 0.5 2.058 GS/s
Devices using dual ADC tile channel 1 4.096 GS/s
Full-scale Input Input 100Ω on-die termination 3 1 VPPD
1 dBm
Analog Input Bandwidth Full-power bandwidth (–3 dB) 3 4 GHz
Common mode voltage 4 AC coupling mode with internal bias 1.25 V
Crosstalk isolation between channels 5 FIN = 240 MHz –70 dBc
FIN = 1.9 GHz –70 dBc
FIN = 2.4 GHz –70 dBc
FIN = 3.5 GHz –70 dBc
  1. Analog inputs at –1 dBFS, unless otherwise noted in the test conditions.
  2. Typical values are specified at nominal voltage, Tj = 25°C.
  3. Consult S parameter I/O files for further details on input characteristics.
  4. When using DC coupling mode, use the VCM output pin to bias the input to the RF-ADC.
  5. Values represent two channel crosstalk worst-case values for any combination of channel selections.
Table 2. RF-ADC Electrical Characteristics for ZU39DR Devices
Parameter Comments/Conditions 1 Min Typ 2 Max Units
Analog Inputs
Resolution 12 Bits
Sample Rate Devices using quad ADC tile channel 0.5 2.220 GS/s
Full-scale Input Input 100Ω on-die termination 1 VPPD
1 dBm
Analog Input Bandwidth Full-power bandwidth (–3 dB) 5 GHz
Return Loss (RL) 3 Up to 4 GHz –10 dB
Up to 5 GHz –8 dB
Common mode voltage 4 AC coupling mode with internal bias 1.25 V
Crosstalk isolation between channels 5 FIN = 240 MHz –70 dBc
FIN = 1.9 GHz –70 dBc
FIN = 2.4 GHz –70 dBc
FIN = 3.5 GHz –70 dBc
FIN = 4.2 GHz –69 dBc
FIN = 4.9 GHz –67 dBc
  1. Analog inputs at –1 dBFS, unless otherwise noted in the test conditions.
  2. Typical values are specified at nominal voltage, Tj = 25°C.
  3. This is the return loss of the worst case channel quoted from DC to a specified frequency point. Consult the S parameter I/O files for further details as input characteristics depend on differential I/O selection. The RL reference plan is closed to the BGA footprint, keeping two times the BGA pitch distance from ball contact to avoid micro-probing electromagnetic disturbance.
  4. When using DC coupling mode, use the VCM output pin to bias the input to the RF-ADC.
  5. Values represent two channel crosstalk worst-case values for any combination of channel selections.
Table 3. RF-ADC Electrical Characteristics for ZU4xDR Devices
Parameter Comments/Conditions 1 Min Typ 2 Max Units
Analog inputs
Resolution 14 Bits
Sample Rate Devices using quad ADC tile channel 0.5 2.5 GS/s
Devices using dual ADC tile channel 1 5 GS/s
Full-scale input 3 Input 100Ω on-die termination when DSA attenuation = 0 dB 1 VPPD
1 dBm
Maximum allowed input power Input 100Ω on-die termination when DSA attenuation ≥ 15 dB 4.8 VPPD
14.6 dBm
Digital Attenuation Range 0 27 dB
Attenuator step size 1 dB
Auto attenuation Automatically set when amplitude over-voltage is asserted 15 dB
Analog input bandwidth 4 Full-power bandwidth (–3 dB) 6 GHz
Return loss (RL) 5 Up to 4 GHz –12 dB
Up to 6 GHz –10 dB
Optimized common mode voltage range Performance optimized range. AC and DC coupling modes 6 0.68 0.7 0.72 V
Maximum common mode voltage range Available range before triggering over-voltage protection. AC and DC coupling modes 6 0.4 0.7 1 V
Crosstalk isolation between channels 7 FIN = 0–4 GHz –75 dBc
FIN = 0–6 GHz –70 dBc
  1. Analog inputs at –1 dBFS, unless otherwise noted in the test conditions.
  2. Typical values are specified at nominal voltage, Tj = 40°C.
  3. Full scale range is defined as the approximate input power required to drive the ADC to full scale output for a 5 MHz input tone. The full scale range can vary from dual to quad ADCs. It is also subject to variation across process, voltage, and temperature and from package types. The typical average value is provided.
  4. ADC bandwidth is defined as the RF input bandwidth, or where the input amplitude response drops 3 dB relative to a low-frequency reference point of 100 MHz.
  5. This is the return loss of the worst case channel quoted from DC to a specified frequency point. Consult the S parameter I/O files for further details because input characteristics depend on channel and package selection. The RL reference plan is close to the BGA footprint, keeping two times the BGA pitch distance from ball contact to avoid micro-probing electromagnetic disturbance.
  6. When using DC coupling mode, use the VCM output pin to bias the input to the RF-ADC.
  7. Values represent two channel crosstalk worst-case values for any combination of channel selections. This specification is only characterized on the XCZU46DR-H1760.
Table 4. RF-ADC Electrical Characteristics for ZU6xDR Devices
Parameter Comments/Conditions 1 Min Typ 2 Max Units
Analog inputs
Resolution 14 Bits
Sample Rate Quad ADC tile when ADC_AVCC = 1.01V and -2I, -2LI 0.5 2.95 GS/s
Quad ADC tile when ADC_AVCC = 1.01V and -1I, -1LI, -1M 0.5 2.7 GS/s
Dual ADC tile when ADC_AVCC = 1.01V and -2I, -2LI 1 5.9 GS/s
Dual ADC tile when ADC_AVCC = 1.01V and -1I, -1LI, -1M 1 5.4 GS/s
Full-scale input 3 Input 100Ω on-die termination when DSA attenuation = 0 dB 1.12 VPPD
2 dBm
Maximum allowed input power Input 100Ω on-die termination when DSA attenuation ≥ 15 dB 4.8 VPPD
14.6 dBm
Digital Attenuation Range 0 27 dB
Attenuator step size 1 dB
Auto attenuation Automatically set when amplitude over-voltage is asserted 15 dB
Analog input bandwidth 4 Full-power bandwidth (–3 dB) 7.125 GHz
Return loss (RL) 5 Up to 4 GHz –12 dB
Up to 7.125 GHz –10 dB
Optimized common mode voltage range Performance optimized range. AC and DC coupling modes 6 0.68 0.7 0.72 V
Maximum common mode voltage range Available range before triggering over-voltage protection. AC and DC coupling modes 6 0.4 0.7 1 V
Crosstalk isolation between channels 7 FIN = 0–4 GHz –69 dBc
FIN = 0–7.125 GHz –63 dBc
  1. Analog inputs at –1 dBFS, unless otherwise noted in the test conditions.
  2. Typical values are specified at nominal voltage, Tj = 40°C.
  3. Full scale range is defined as the approximate input power required to drive the ADC to full scale output for a 5 MHz input tone. The full scale range can vary from dual to quad ADCs. It is also subject to variation across process, voltage, and temperature and from package types. The typical average value is provided.
  4. ADC bandwidth is defined as the RF input bandwidth, or where the input amplitude response drops 3 dB relative to a low-frequency reference point of 100 MHz.
  5. This is the return loss of the worst case channel quoted from DC to a specified frequency point. Consult the S parameter I/O files for further details because input characteristics depend on channel and package selection. The RL reference plan is close to the BGA footprint, keeping two times the BGA pitch distance from ball contact to avoid micro-probing electromagnetic disturbance.
  6. When using DC coupling mode, use the VCM output pin to bias the input to the RF-ADC.
  7. Values represent two channel crosstalk worst-case values for any combination of channel selections. This specification is only characterized on the XCZU67DR-E1156.