PS Power-On/Off Power Supply Sequencing

Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926)

Document ID
DS926
Release Date
2024-05-31
Revision
1.13 English

The low-power domain (LPD) must operate before the full-power domain (FPD) can function. The low-power and full-power domains can be powered simultaneously. The PS_POR_B input must be asserted to GND during the power-on sequence (see Table 4). The FPD (when used) must be powered before PS_POR_B is released.

To achieve minimum current draw at power-on, the recommended power-on sequence for the low-power domain (LPD) is listed. The recommended power-off sequence is the reverse of the power-on sequence.

  1. VCC_PSINTLP
  2. VCC_PSAUX, VCC_PSADC, and VCC_PSPLL in any order or simultaneously.
  3. VCCO_PSIO

To achieve minimum current draw at power-on, the recommended power-on sequence for the full-power domain (FPD) is listed. The recommended power-off sequence is the reverse of the power-on sequence.

  1. VCC_PSINTFP and VCC_PSINTFP_DDR driven from the same supply source.
  2. VPS_MGTRAVCC and VCC_PSDDR_PLL in any order or simultaneously.
  3. VPS_MGTRAVTT and VCCO_PSDDR in any order or simultaneously.