Symbol | Description 1, 2 | Min | Typ | Max | Units |
---|---|---|---|---|---|
Processor System |
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VCC_PSINTFP 3 | PS full-power domain supply voltage | 0.808 | 0.850 | 0.892 | V |
For -1LI, -2LI, and -2LE (VCCINT = 0.72V) devices: PS full-power domain supply voltage | 0.808 | 0.850 | 0.892 | V | |
VCC_PSINTLP | PS low-power domain supply voltage | 0.808 | 0.850 | 0.892 | V |
For -1LI, -2LI, and -2LE (VCCINT = 0.72V) devices: PS low-power domain supply voltage | 0.808 | 0.850 | 0.892 | V | |
VCC_PSAUX | PS auxiliary supply voltage | 1.710 | 1.800 | 1.890 | V |
VCC_PSINTFP_DDR 3 | PS DDR controller and PHY supply voltage | 0.808 | 0.850 | 0.892 | V |
For -1LI, -2LI, and -2LE (VCCINT = 0.72V) devices: PS DDR controller and PHY supply voltage | 0.808 | 0.850 | 0.892 | V | |
VCC_PSADC | PS SYSMON ADC supply voltage relative to GND_PSADC | 1.710 | 1.800 | 1.890 | V |
VCC_PSPLL | PS PLL supply voltage | 1.164 | 1.200 | 1.236 | V |
VPS_MGTRAVCC 4 | PS-GTR supply voltage | 0.825 | 0.850 | 0.875 | V |
VPS_MGTRAVTT 4 | PS-GTR termination voltage | 1.746 | 1.800 | 1.854 | V |
VCCO_PSDDR 5 | PS DDR I/O supply voltage | 1.06 | – | 1.575 | V |
VCC_PSDDR_PLL | PS DDR PLL supply voltage | 1.710 | 1.800 | 1.890 | V |
VCCO_PSIO 6 | PS I/O supply | 1.710 | – | 3.465 | V |
VPSIN | PS I/O input voltage | –0.200 | – |
VCCO_PSIO + 0.200 |
V |
PS DDR I/O input voltage | –0.200 | – |
VCCO_PSDDR + 0.200 |
V | |
VCC_PSBATT 7 | PS battery-backed RAM and battery-backed real-time clock (RTC) supply voltage | 1.200 | – | 1.500 | V |
Programmable Logic |
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VCCINT |
PL internal supply voltage |
0.825 | 0.850 | 0.876 | V |
For -1LI, -2LI, and -2LE (VCCINT = 0.72V) devices: PL internal supply voltage |
0.698 | 0.720 | 0.742 | V | |
VCCINT_IO 8 |
PL internal supply voltage for the I/O banks |
0.825 | 0.850 | 0.876 | V |
For -1LI, -2LI, and -2LE (VCCINT = 0.72V) devices: PL internal supply voltage for the I/O banks |
0.825 | 0.850 | 0.876 | V | |
VCCBRAM 8 | Block RAM and UltraRAM supply voltage | 0.825 | 0.850 | 0.876 | V |
VCCAUX 11 | Auxiliary supply voltage | 1.746 | 1.800 | 1.854 | V |
VCCO | Supply voltage for HD I/O banks 9 | 1.140 | – | 3.400 | V |
Supply voltage for HP I/O banks 10 | 0.950 | – | 1.900 | V | |
VCCAUX_IO 11 | Auxiliary I/O supply voltage | 1.746 | 1.800 | 1.854 | V |
VIN 12, 13 | I/O input voltage | –0.200 | – | VCCO + 0.200 | V |
IIN 14 |
Maximum current through any PL or PS pin in a powered or unpowered bank when forward biasing the clamp diode |
– | – | 10 | mA |
GTY Transceiver |
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VMGTAVCC 15 |
Analog supply voltage for the GTY transceiver |
0.873 | 0.900 | 0.927 | V |
VMGTAVTT 15 |
Analog supply voltage for the GTY transmitter and receiver termination circuits |
1.164 | 1.200 | 1.236 | V |
VMGTVCCAUX 15 |
Auxiliary analog QPLL voltage supply for the transceivers |
1.746 | 1.800 | 1.854 | V |
VMGTAVTTRCAL 15 |
Analog supply voltage for the resistor calibration circuit of the GTY transceiver column |
1.164 | 1.200 | 1.236 | V |
RF-ADC, RF-DAC, and SD-FEC |
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VADC_AVCC | ADC and PLL supply voltage for ZU2xDR, ZU39DR, ZU4xDR | 0.897 | 0.925 | 0.953 | V |
VADC_AVCC | ADC and PLL supply voltage for ZU6xDR | 0.980 | 1.010 | 1.040 | V |
VADC_AVCCAUX | Input buffer and PLL supply voltage | 1.746 | 1.800 | 1.854 | V |
VDAC_AVCC | DAC and PLL supply voltage | 0.897 | 0.925 | 0.953 | V |
VDAC_AVCCAUX | Output buffer and PLL supply voltage | 1.746 | 1.800 | 1.854 | V |
VDAC_AVTT 16 | Termination voltage, on-die 50Ω termination resistors: 20 mA | 2.425 | 2.500 | 2.575 | V |
Termination voltage, on-die 50Ω termination resistors: 32 mA | 2.910 | 3.000 | 3.090 | V | |
Termination voltage, on-die 50Ω termination resistors variable output power (VOP) disabled 17 | 2.425 | 2.500 | 2.575 | V | |
Termination voltage, on-die 50Ω termination resistors VOP enabled 17 | 2.910 | 3.000 | 3.090 | V | |
VCCINT_AMS 18 | Digital down converter supply voltage | 0.825 | 0.850 | 0.876 | V |
VCCSDFEC 19 | SD-FEC supply voltage | 0.825 | 0.850 | 0.876 | V |
PL System Monitor |
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VCCADC |
PL System Monitor supply relative to GNDADC |
1.746 | 1.800 | 1.854 | V |
VREFP |
PL System Monitor externally supplied reference voltage relative to GNDADC |
1.200 | 1.250 | 1.300 | V |
Temperature |
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Tj 20 | Junction temperature operating range for extended (E) temperature devices 21 | 0 | – | 100 | °C |
Junction temperature operating range for industrial (I) temperature devices 22 | –40 | – | 100 | °C | |
Junction temperature operating range for military (M) temperature devices | –55 | – | 125 | °C | |
Junction temperature operating range for eFUSE programming | –40 | – | 125 | °C | |
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