TX Interface

Versal ACAP GTM Transceivers Architecture Manual (AM017)

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1.0 English

The TX interface is the gateway to the TX datapath of the GTM transceiver. Applications transmit data through the GTM transceiver by writing data to the TXDATA port on the positive edge of TXUSRCLK. Port widths can be 32, 40, 64, 80, 128, 160, and 256 bits for NRZ mode, or 64, 80, 128, 160, 256, 320, and 512 bits for PAM4 mode. The rate of the parallel clock (TXUSRCLK) at the interface is determined by the TX line rate and the width of the TXDATA port.

Each TX fabric interface natively supports up to 256 bits from the fabric design input. To extend fabric interface support to 320 and 512 bits, two TX channel interfaces should be combined—this is referred to as half density mode. In this mode, only one TX front end channel is active. Refer to TX Interface Width Configuration for more details.