RX Interface Width Configuration

Versal Adaptive SoC GTM Transceivers Architecture Manual (AM017)

Document ID

AM017

Release Date

2024-09-05

Revision

1.1 English

The GTM receiver contains an 80-bit internal datapath in NRZ mode and a 160-bit internal datapath for PAM4 mode that is configurable by setting the RX_PMA_DATA_WIDTH attribute. The interface width is configurable by setting the RX_DATA_WIDTH attribute. In NRZ mode, the interface can be configured to 32, 40, 64, 80, 128, 160, and 256 bits. In PAM4 mode, the interface can be configured to 64, 80, 128, 160, 256, 320, and 512 bits.

The following table shows how the interface width for the RX datapath is selected.

Table 1. RX Interface Datapath Configuration
Encoding	Density	RX_PMA_DATA_WIDTH Encoding	RX_DATA_WIDTH Encoding	RX Internal Width	RX Interface Width
NRZ	Full	0	4	80	32
			5		40
			6		64
			7		80
			8		128
			9		160
			10		256
PAM4	Full	1	6	160	64
			7		80
			8		128
			9		160
			10		256
	Half		11		320
	Half		12		512

When the interface width is configured to either 320 or 512 bits, this results in a half density configuration in which two channel interfaces are combined to act as one. In this mode, only a single PCS/PMA front end channel is in operation.

When either channel CH0 or CH1 is operating in half density mode, the fabric interface combines the data from adjacent channels to group as a set of 320 or 512 bits before forwarding to the RX FIFO. Designating a channel to be used in half density mode can be done by setting the adjacent channel's RX_USRCLK_SEL attribute High. An additional limitation is that the half density configuration must use either the channel 0/1 pair or channel 2/3 pair in the same Quad. Mixing and matching with different channels is not allowed. The following table shows possible channel combinations.

Table 2. RX Half Density Modes
CH0 RX_USRCLK_SEL	CH1 RX_USRCLK_SEL	Fabric Interface Operating Mode
0	0	Both channels are in full density mode.
0	1	CH0 is in half density mode.
1	0	CH1 is in half density mode.
1	1	Invalid.

The following table shows the port connections for different data widths.

Table 3. RX Fabric Port Connections for Different Data Widths
RX Fabric Data Width	Internal PCS Data Path Bit Ranges	Fabric Width Mode	Non-Active Channel (MSB) Last Bits to RX	Active Channel (LSB) First Bits to RX
512	[511:0]	Half Density	RXDATA[255:0]	RXDATA[255:0]
320	[415:256, 159:0]	Half Density	RXDATA[159:0]	RXDATA[159:0]
256	[255:0]	Full Density	-	RXDATA[255:0]
160	[159:0]	Full Density	-	RXDATA[159:0]
128	[127:0]	Full Density	-	RXDATA[127:0]
80	[79:0]	Full Density	-	RXDATA[79:0]
64	[63:0]	Full Density	-	RXDATA[63:0]
40	[39:0]	Full Density	-	RXDATA[39:0]
32	[31:0]	Full Density	-	RXDATA[31:0]
In half-density mode, the least significant bits are in the active channel, and the most significant bits are in the non-active channel. In 320-bit mode, the data widths are split between the two channels to have 160 in each.