After Changing the Reference Clock to the LCPLL Being Used

Versal Adaptive SoC GTM Transceivers Architecture Manual (AM017)

Document ID
AM017
Release Date
2024-09-05
Revision
1.1 English

Whenever the reference clock input to the PLL is changed, the PLL must be reset afterward to ensure that it locks to the new frequency. Perform a full RX sequential reset after the PLL fully completes its reset procedure.