LVPECL

Versal Adaptive SoC GTM Transceivers Architecture Manual (AM017)

Document ID
AM017
Release Date
2024-09-05
Revision
1.1 English

The following figure shows how an LVPECL oscillator is connected to a reference clock input of a GTM transceiver.

Figure 1. Interfacing an LVPECL Oscillator to the GTM Transceiver Reference Clock Input
Note: These are nominal values only. Refer to the oscillator vendor data sheet for actual bias resistor requirements.