Bank Diagram by Package for VP1202

Versal Adaptive SoC Packaging and Pinouts Architecture Manual (AM013)

Document ID
Release Date
1.4 English
Figure 1. VP1202 Banks in VFVF1760 Package

Note: This note pertains to the VP1202 Banks in VSVA2785 Package shown in the following figure. Quad 206 was placed in power group LC in earlier versions of the AMD Vivado™ Design Suite (2023.1 and earlier). As well, previously published versions of the ASCII Pinout Files placed Quad 206 in power group LC. Power pins currently corresponding to power group LN (GTM_AVCCAUX_LN, GTM_AVCC_LN, and GTM_AVTT_LN) were therefore labeled as NC. If designing using these previous versions of Vivado tools or the ASCII Pinout Files, a change from NC to the corresponding LN power group pins must be taken into consideration to make certain that power is supplied to Quad 206.
Figure 2. VP1202 Banks in VSVA2785 Package