VCC_PSDDR_PLL Supply

V_{CC_PSDDR_PLL} is a 1.8V nominal supply that provides power to the PLL used for the PS DDR controller. It can be powered separately or derived from the V_{CC_PSAUX} supply. If powered by V_{CC_PSAUX}, V_{CC_PSDDR_PLL} must be filtered through a 120W @ 100 MHz, size 0603 ferrite bead and a 10 µF or larger, size 0603 decoupling capacitor. In both cases, a 1.0 µF 0201 or 10 µF 0402 capacitor must be placed near the V_{CC_PSDDR_PLL} BGA via.

The PCB construction of the V_{CC_PSDDR_PLL} power supply must be carefully managed. The recommended connection between the 0603 capacitor and the V_{CC_PSDDR_PLL} BGA ball is a planelet with a minimum width of 80 mil (2 mm) and a length of less than 3,000 mil (76 mm). If a planelet cannot be used, a trace with a maximum impedance of 40W and a length of less than 2,000 mil (50.8 mm) must be used. The 0201 or 0402 capacitor should be placed a close as possible to the FPGA, along with the shortest possible trace length. This Figure shows an example of the filtering and local capacitor circuit used when V_{CC_PSDDR_PLL} is derived from V_{CC_PSAUX}.

This Figure shows an example of the layout of the same filtering circuit.

The recommended components are:

•Ferrite bead: Murata BLM18SG121TN1

•10 µF (or larger) capacitor: Murata GRM188C80E476ME05

•1.0 µF 0201 or 10 µF 0402 capacitor: Murata GRM155C80J106ME11D