Step 5: Hardware Validation - Step 5: Hardware Validation - 2025.2 English - UG947

Vivado Design Suite Tutorial: Dynamic Function eXchange (UG947)

Document ID
UG947
Release Date
2026-02-11
Version
2025.2 English

Hardware validation and interaction with the ChipScope debug cores can be done via XSDB.

  1. Download the full PDI from the parent implementation and poll the GPIOs from the static region and rp1rm1. The GPIO from the static region is connected to a 32-bit down counter and rp1rm1 is connected to a 32-bit up counter.
    xsdb% targets
      1  Versal xcvc1902
         2  RPU (Reset)
            3  Cortex-R5 #0 (RPU PGE Reset)
            4  Cortex-R5 #1 (RPU PGE Reset)
         5  APU
            6  Cortex-A72 #0 (Power On Reset)
            7  Cortex-A72 #1 (Power On Reset)
         8  PPU
            9  MicroBlaze PPU (Sleeping)
        10  PSM
        11  PMC
        12  PL
    xsdb% ta 5
    xsdb% mrd -force 0x80210000
    80210000:   8FE925FD
    
    xsdb% mrd -force 0x80210000
    80210000:   8560E3C5
    
  2. Read the GPIO in rp1rm1 to find the values counting up.
    xsdb% mrd -force 0x80220000
    80220000:   54FFC5A1
    
    xsdb% mrd -force 0x80220000
    80220000:   5B4B7E91
    
  3. Observe the output of counters using ILAs in the static region and rp1rm1.
    • static region ILA

    • rp1rm1 ILA

  4. Enable the Decouple signal before downloading the partial PDI for rp1rm2, which contains the count_down_vio module.
    xsdb% mwr -force 0x80200000 0x01
    xsdb% mrd -force 0x80200000
    80200000:   00000001
    
  5. Download partial PDI for rp1rm2 (from child_0_impl_1) and release the Decouple signal.
    xsdb% mwr -force 0x80200000 0x00
    xsdb% mrd -force 0x80200000
    80200000:   00000000
    
  6. Observe the Down counter in rp1rm2.
    xsdb% mrd -force 0x80220000
    80220000:   6B5A4A7D
    
    xsdb% mrd -force 0x80220000
    80220000:   60EF29C0
    
  7. Observe the rp1rm2 Down counter using VIO in AMD Vivado™ Hardware Manager.

  8. Enable the Decouple signal before downloading the partial PDI for rp1rm3.
    xsdb% mwr -force 0x80200000 0x01
    xsdb% mrd -force 0x80200000
    80200000:   00000001
    
  9. Once rp1rm3 partial PDI is downloaded, disable the Decouple signal.
    xsdb% mwr -force 0x80200000 0x00
    xsdb% mrd -force 0x80200000
    80200000:   00000000
    
  10. rp1rm3 has both up and down counters connected to two separate ILAs.
    xsdb% mrd -force 0x80220000
    80220000:   24776086
    
    xsdb% mrd -force 0x80220000
    80220000:   36D42755
    
    xsdb% mrd -force 0x80230000
    80230000:   A8B2F57F
    
    xsdb% mrd -force 0x80230000
    80230000:   9B470AEA
    
  11. Observe the outputs in ILAs.
    • Up Counter in rp1rm3

    • Down Counter in rp1rm3