Step 4: Examine the Results - Step 4: Examine the Results - 2025.2 English - UG947

Open individual runs to examine the design results.

1. Open the routed checkpoint for impl_1 to examine the parent configuration. This design image has the full static design along with the contents of rp1rm1 in the RP Pblock.
   
   
2. Open the routed design checkpoint for child_gb_impl_1. This has the full static design from the parent run plus a greybox as the reconfigurable module. The static logic is locked so it is shown in orange.
   
   
3. Open the routed design checkpoint for child_0_impl_2. This shows the orange locked static logic is reduced to a minimal set of logic and routing around the reconfigurable partition Pblock.
   
   
4. Finally, use the footprint visualization utility to see the expanded routing region that surrounds this Pblock.

   select_objects [get_dfx_footprint -route -of_objects [get_cells design_1_i/rp1]]

   
   
   

Compare this to the prior image which shows that the user-defined reconfigurable Pblock aligns to a single clock region. This highlighting shows the Pblock range expands left and right into neighboring clock regions to obtain routing resources to improve routability. It does not extend into clock regions above or below, as that would require adding two more complete clock regions to the partial bitstream, more than tripling its size.