Lab 2 Conclusion - 2024.2 English - 2024.1 English

Vivado Design Suite Tutorial: Dynamic Function eXchange (UG947)

Document ID
UG947
Release Date
2024-11-13
Version
2024.2 English

This concludes Lab 2. In this lab, you:

  • Synthesized a design bottom-up to prepare for Dynamic Function eXchange implementation
  • Created a valid floorplan for a Dynamic Function eXchange design
  • Created two configurations with common static results
  • Implemented these two configurations, saving the static design to be used in each
  • Created checkpoints for static and reconfigurable modules for later reuse
  • Examined framesets and verified the two configurations
  • Created full and partial bitstreams
  • Created and used clearing bitstreams for AMD UltraScaleā„¢ devices
  • Configured and partially reconfigured an FPGA