Known Issues - 2023.2 English

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

Document ID
UG909
Release Date
2023-11-15
Version
2023.2 English
  • If the initial configuration of a 7 series SSI device (7V2000T, 7VX1140T) is done through an SPI interface, partial bitstreams cannot be delivered to the master (or any) ICAP; they must be delivered to an external port, such as JTAG. If the initial configuration is done through any other configuration port, the master ICAP can be used as the delivery port for partial bitstreams. Contact AMD Support for a workaround.
  • Do not drive multiple outputs of a single RM with the same source. Each output of an RM must have a unique driver.
  • When using AMD Virtex™ UltraScale+™ VU29P devices, connections between the IBUFDS_GTM and GTM_DUAL sites might be unroutable if the placer does not place them on the same SLR and the same side of the device. You might encounter route_design Route 35-7 in this case. If this occurs, you must LOC both the IBUFDS_GTM and GTM_DUAL instances to appropriate locations in the same SLR on the same side of the device.
  • Tandem Configuration and Dynamic Function eXchange currently cannot be used in the same AMD Versal™ design for devices using SSI technology.
  • Engineering Silicon (ES) for AMD UltraScale™ or AMD UltraScale+™ devices does not officially support Dynamic Function eXchange. To investigate the capabilities of DFX on ES devices, contact AMD Support for advice.