Generating Bitstreams - 2024.1 English

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

Document ID
UG909
Release Date
2024-06-12
Version
2024.1 English

Once all desired Configurations have been placed and routed, bitstreams may be generated. Just as with Implementation, the Generate Bitstream button in the Flow Navigator may be used. This launches write_bitstream for all child runs as well as the active parent. A local right-click call to write_bitstream on any Configuration is also available.

The pr_verify utility is automatically called prior to write_bitstream on each child Configuration run. This routed database is compared to the parent database to ensure all DFX rules have been met. The results of this check are stored in the run directory under the name <impl_name>_pr_verify.log.

By default, a full design bitstream and all partial (and for AMD UltraScaleā„¢ , clearing) bitstreams are generated for all routed configurations. You can request specific bitstreams only by utilizing the write_bitstreams options available. Under the Write Bitstream options category in the Options pane for the Implementation Run Properties, use the More Options field to select one of these options:

  • -no_partial_bitfile generates only the full configuration file and no partial bitstreams.
  • -cell <cell> generates only the partial bitstream for the requested cell.