As in a flat flow, bitstreams are created with the write_bitstream command. For each design configuration, simply issue
write_bitstream to create a full standard
configuration file plus one partial bit file for each RM within that configuration.
AMD recommends providing the configuration
name and RM names in the -file option specified with
write_bitstream. Only the base bit file name can be
modified, so it is important to record which RMs were selected for each
configuration.
Using the previous design, the following is an example of reading routed checkpoints (configurations) and creating bitstreams for all implemented RMs.
open_checkpoint config1_routed.dcp
write_bitstream config1This command generates all possible bitstreams for this particular configuration. It creates a full design bitstream called config1.bit. This bitstream should be used to program the device from power-up and includes the functionality of any RMs contained within. It also creates partial bit files config1_pblock_rp1_partial.bit and config1_pblock_rp2_partial.bit that can be used to reconfigure these modules while the FPGA continues to operate. For UltraScale devices, it creates clearing bitstreams that pair with each partial bitstream, allowing you to prepare the partition for the next partial image. Repeat these steps for each configuration.
The size of each partial bitstream is reported in the output from write_bitstream. As this command is run, these messages are
reported for each partial and clearing bit file.
Creating bitmap...
Creating bitstream...
Partial bitstream contains 3441952 bits.
Writing bitstream ./Bitstreams/right_up_pblock_inst_shift_partial.bit...Bitstream compression, encryption, and other advanced features can be used. See Known Limitations for specific unsupported use cases for UltraScale devices.