HLS General Options - 2023.2 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
UG1393
Release Date
2023-12-13
Version
2023.2 English
Important: The following options must appear in the HLS configuration file under the [hls] header.
clock

Specify the clock period in ns or MHz (ns is default). If no period is specified a default period of 10 ns is used.

clock=8ns
Important: If your HLS configuration file uses platform= instead of part= then you must also specify freqhz= instead of clock= as shown here to change the default clock frequency of the platform.
clock_uncertainty
Specify how much of the clock period is used as a margin by HLS. The margin of uncertainty is subtracted from the clock period to create an effective clock period. The clock uncertainty is defined in ns, or as a percentage of the clock period. The clock uncertainty defaults to 27% of the clock period. When specifying a value, the default units is ns but % or MHz can also be used.
clock_uncertainty=15%
flow_target

Set the flow target to synthesize either a Vitis kernel (.xo) or a Vivado IP (.xci). The Vitis kernel is used in the Application Acceleration flow, while the Vivado IP can be used in the embedded software design flow.

Important: There are differences in the interface definition supported by Vivado IP or Vitis kernels.

C-Synthesis Sources

syn.cflags
Defines compilation flags to be applied to all syn.file defined source files for use during synthesis.
syn.cflags=-I../../src/
syn.csimflags

Defines compilation flags to be applied to all syn.file source files for use during C-simulation or RTL/Co-simulation.

syn.file

Specify the file path and name of a source file to be used during synthesis of the HLS component. Multiple files require multiple syn.file statements.

The file paths can be specified as either absolute or relative, where relative paths are relative to the location of the config file, whether inside the HLS component or outside the component.
syn.file=../../src/dct.cpp
syn.file_cflags
Apply a compilation flag for synthesis to the specified source file. Specify the file path and name first, followed by a comma, followed by the cflags:
syn.file_cflags=../../src/dct.cpp,-I../../src/
syn.file_csimflags
Apply a compilation flag for simulation to the specified source file. Specify the file path and name first, followed by a comma, followed by the csimflags.
syn.file_csimflags=../../src/dct.cpp,-Wno-unknown-pragmas
syn.blackbox.file
Specify the JSON file to be used for an RTL blackbox. The information in this file is used by the HLS compiler during synthesis and when running RTL/Co-simulation, as described in Adding RTL Blackbox Functions.
syn.blackbox.file=../../RTL/fft.json
syn.top
Specifies the name of the function to be synthesized as the top-level function for the HLS component. This can be used to identify the top function in source code where multiple functions are defined.
syn.top=dct
Important: Any functions called by the top-level function will also become part of the HLS component.

Test bench Sources

tb.cflags arg
Defines compilation flags to be applied to all tb.file defined source files for use during simulation or co-simulation.
tb.cflags=-Wno-unknown-pragmas
tb.file arg

Specify the file path and name of a test bench source file to be used during simulation or co-simulation of the HLS component. Multiple files require multiple tb.file statements.

The file paths can be specified as either absolute or relative, where relative paths are relative to the location of the config file, whether inside the HLS component or outside the component.
tb.file=../../src/dct_test.cpp
tb.file_cflags arg
Apply a compilation flag for simulation or co-simulation to the specified test bench source file. Specify the file path and name first, followed by a comma, followed by the cflags:
syn.file_cflags=../../src/dct.cpp,-Wno-unknown-pragmas