The detailed kernel trace provides easy access to the AXI transactions and their properties. The AXI transactions are presented for the global memory, in addition to the Kernel side (Kernel "pass" 1:1:1) of the AXI interconnect. The following figure illustrates a typical kernel trace of a newly accelerated algorithm.
Figure 1. Accelerated Algorithm Kernel Trace
Most interesting with respect to performance are the fields:
- Burst Length
- Describes how many packages are sent within one transaction.
- Burst Size
- Describes the number of bytes being transferred as part of one package.
Given a burst length of 1 and 4 bytes per package, it will require many individual AXI transactions to transfer any reasonable amount of data.
Note: The Vitis core
development kit never creates burst sizes less than 4 bytes, even if smaller data is
transmitted. In this case, if consecutive items are accessed without AXI bursts enabled,
it is possible to observe multiple AXI reads to the same address.
Small burst lengths and burst sizes considerably less than 512 bits are therefore good opportunities to optimize interface performance.