This interrupt is triggered every time the HDMI PHY Controller /HDMI GT Subsystem is reconfigured and the output clock is stabilized and ready for the HDMI 2.1 TX Subsystem to transmit a video stream.
The callback function must perform the following:
- Set the HDMI 2.1 TX Subsystem to run at
the corresponding mode
- FRL
- TMDS_HDMI
- TMDS_DVI
- Configure cable driver with the correct setting based on the required line rate.
- If the HDMI 2.1 TX Subsystem is running
in TMDS mode, enable the TX TMDS clock by calling the HDMI PHY Controller
/HDMI GT Subsystem API:
void XHdmiphy1_Clkout1OBufTdsEnable(XHdmiphy1 *InstancePtr, XHdmiphy1_DirectionType Dir, u8 Enable);
- Set the HDMI 2.1 TX Subsystem Sampling
Rate with the HDMI PHY Controller
/HDMI GT Subsystem TX sampling rate.
void XV_HdmiTxSs1_SetSamplingRate(XV_HdmiTxSs1 *InstancePtr, u8 SamplingRate);