Device, Package, and Speed Grade Selections - 1.2 English

Device, Package, and Speed Grade Selections - 1.2 English - PG350

HDMI 2.1 Transmitter Subsystem v1.2 Product Guide (PG350)

Document ID

PG350

Release Date

2025-08-26

Version

1.2 English

For more information on the device constraint/dependency, see the HDMI PHY Controller LogiCORE IP Product Guide (PG333) / HDMI GT Controller LogiCORE IP Product Guide (PG334) .

The following table shows the device and speed grade selections for HDMI 2.1 TX Subsystem.

Table 1. HDMI 2.1 FRL Line Rates Supported Across Devices
MAX FRL Rate			12 Gb/s @ 4 Lanes	10 Gb/s @ 4 Lanes	8 Gb/s @ 4 Lanes	6 Gb/s @ 4 Lanes	6 Gb/s @ 3 Lanes	3 Gb/s @ 3 Lanes	TMDS
Device Family	Speed Grade	GT PLL	12 Gb/s @ 4 Lanes	10 Gb/s @ 4 Lanes	8 Gb/s @ 4 Lanes	6 Gb/s @ 4 Lanes	6 Gb/s @ 3 Lanes	3 Gb/s @ 3 Lanes	TMDS
AMD Zynq™ UltraScale+™	–1LV, –2LV¹	CPLL, QPLL	Not Supported		Supported
	–1, –1L⁴	CPLL	Not Supported		Supported
	–1, –1L⁴	QPLL	Not Supported	Supported
	–2, –2L, –3	CPLL, QPLL	Supported
AMD Kintex™ UltraScale+™	–1LV, –2LV¹	CPLL, QPLL	Not Supported		Supported
	–1, –1L⁴	CPLL	Not Supported		Supported
	–1, –1L⁴	QPLL	Not Supported	Supported
	–2, –2L, –3	CPLL, QPLL	Supported
AMD Virtex™ UltraScale+™	–2LV¹	CPLL, QPLL	Not Supported		Supported
	–1⁴	CPLL	Not Supported		Supported
	–1⁴	QPLL	Not Supported	Supported
	–2, –2L, –3	CPLL, QPLL	Supported
Artix UltraScale+	–1LV¹	CPLL, QPLL	Not Supported		Supported
	–1, –1L⁴	CPLL	Not Supported		Supported
	–1, –1L⁴	QPLL	Not Supported	Supported
	–2	CPLL, QPLL	Supported
AMD Versal™ Adaptive SoCs	–1LP, –1LHP, –2LP	LCPLL, RPLL	Not Supported		Supported
	–1MP	LCPLL, RPLL	Not Supported	Supported
	–2MP, –2HP, –3HP	LCPLL, RPLL	Supported
5Kp100, 5Kp120 resolutions are supported only in 8ppc mode for –1LV, –2LV, –1LP, –1LHP, and –2LP devices due to the s_axis_video_clock fmax restriction. Maximum FRL rate supported by IP is selected automatically based on device family and speed grade. You must provide the frl_clock frequency mentioned in the HDMI 2.1 Clocks table. However, you can lower the FRL rate by changing the MAX FRL rate in HF-VSDB block of EDID. xcau10p device is not supported due to fabric size. For GTHE4, –1,–1M, –1L, -1LV, –2LV, and –2LVI parts, and for GTYE4 –1,–1M,–1L, and –1LV parts, the maximum supported FRL line rate is 8.0 Gb/s because of the limitation on CPLL and USRCLKs.