The HDMI 2.1 TX Subsystem is designed to support both progressive and interlaced video. In this section, the focus is to show how to handle interlaced video as it is more straightforward for progressive video.
Taking 1920x1080@50 Hertz (I) as an example, the detailed timing information is shown in the following table.
Name | Timing Field Subset | Value |
---|---|---|
HActive | 1920 | |
HBlank | 720 | |
HFrontPorch | 528 | |
HSyncWidth | 44 | |
HBackPorch | 148 | |
HTotal | 2640 | |
VActive | 540 | |
F0VBlank | 22 | |
F0PVFrontPorch | 2 | |
F0PVSyncWidth | 5 | |
F0PVBackPorch | 15 | |
F0PVTotal | 562 | |
F1VBlank | 23 | |
F1VFrontPorch | 3 | |
F1VSyncWidth | 5 | |
F1VBackPorch | 15 | |
F1VTotal | 563 |
For interlaced video, each frame consists of two fields. One field carries the odd lines and the other field carries the even lines. After putting both fields together, you get the complete frame. Therefore,
- Vertical Active per Field = Vertical Active Lines / 2
- Frame Rate = Field Rate / 2.
In this example,
- VActive = 1080/2 = 540
- Field Rate = 50 Hertz
- Frame Rate = 50/2 = 25 Hertz
To design using the AXI4-Stream
Interface, generate two fields of video with timing using the values from the previous
table.
For complete timing information, refer to CTA-861-H.
Only active video data compliant with AXI4-Stream
protocol is needed. The AXI4-Stream to Video Out core
inside the HDMI 2.1 TX Subsystem converts the AXI4-Stream video into native video. Ensure that fid
is driven to align with the field video data. For
details, refer to the
AXI4-Stream to
Video Out LogiCORE IP Product Guide (PG044).