Use the following steps to execute the system using generated bitstream and software elf from the example design.
- Launch the Xilinx System Debugger by selecting .
- In the AMD command shell window, change to the Example
Design Project directory:
Vivado% cd ./<IP instance name>_ex
- Invoke Xilinx System Debugger (xsdb).
Vivado% xsdb
- Establish connections to debug targets.
xsdb% connect
- Download the bitstream to the
FPGA.
xsdb% fpga -file ./<IP instance name>_ex.runs/impl_1/exdes_wrapper.bit
- Set the target processor.
xsdb% target 1* xcvu9p 2 MicroBlaze Debug Module at USER2 3 MicroBlaze #0 (Running) xsdb% target -set 3
- Download the software .elf to the FPGA.
xsdb% dow ./<vitis_workspace>/<application_name>_1/Debug/<application_name>_1.elf
- Run the software.
xsdb% stop xsdb% rst xsdb% con
- Exit the XSDB command prompt.
xsdb% exit