The HDMI 2.1 Transmitter Subsystem outputs HDMI™ 2.1 protocol video and works with the HDMI PHY Controller /HDMI GT Subsystem. For more information, see the HDMI PHY Controller LogiCORE IP Product Guide (PG333) / HDMI GT Controller LogiCORE IP Product Guide (PG334) .
The HDMI 2.1 TX Subsystem is hierarchically packaged with the following subcores to support AXI4-Stream based video and works seamlessly with other AMD video processing IP cores.
- HDMI 2.1 Transmitter core
- Video Timing Controller (VTC)
- AXI4-Stream to Video Out Bridge
- AXI Remapper TX
The subsystem also includes an optional HDCP 2.3 controller and HDCP 1.4 controller (together with an AXI Timer core as a helper core) for HDCP 2.3 or HDCP 1.4 encryption functionality.
You can configure it by setting the parameters in the AMD Vivado™ Integrated Design Environment (IDE) interface and the subsystem creates the required hardware accordingly. The following figures show the architecture of the subsystem. The HDMI 2.1 TX subsystem supports the following types of video interface:
- AXI4-Stream Video interface
- Native Video interface
- Native Video (Vectored Data Enable (DE)) interface
The following table summarizes the supported video timing for each interface, depending on the PPC settings.
| Video Interface | Color Space | Pixels Per Clock (PPC) | |
|---|---|---|---|
| 4 | 8 | ||
| AXI4-Stream | RGB,YCbCr 444, YCbCr 422 | HACTIVE should be divisible by 4. | HACTIVE should be divisible by 8. |
| YCbCr 420 | HACTIVE should be divisible by 8. | ||
| Native Video | RGB,YCbCr 444, YCbCr 422 | HACTIVE, HSYNC, HTOTAL should be divisible by 4. | Not applicable (Always 4 PPC). |
| YCbCr 420 | |||
| Native Video (Vectored DE) | RGB,YCbCr 444, YCbCr 422 | No restrictions. All combinations are supported. | |
| YCbCr 420 | |||
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