A Customize IP window opens. Configure the HDMI 2.1 TX Subsystem, then select OK.
- Refer to the Design Flow Steps chapter for a detailed
description on Customizing and Generating the Subsystem.
- You can rename the IP component name, which is used as
example design project name.
Important: To
enable 8kp48, 8kp50, 8kp60/10kp60 YUV420, select Number of pixels per clock as 8. Otherwise, it is
recommended that you select Number of pixels per
clock as 4, which is sufficient to support up to
8k/10kp30.
Figure 1. Top Level Tab
Note: Due to a board design limitation, there is no
available clock source on the VCU118 board for the NI-DRU reference clock.
Therefore, if you are targeting the VCU118 board, the NI-DRU is disabled by
default.