Input Serializer/Deserializer Switching Characteristics - DS189

Setup/Hold for Control Lines

T_{ISCCK_BITSLIP}/ T_{ISCKC_BITSLIP}

BITSLIP pin setup/hold with respect to CLKDIV.

0.02/0.15

0.02/0.17

0.02/0.17

ns

T_{ISCCK_CE}/ T_{ISCKC_CE}

CE pin setup/hold with respect to CLK
(for CE1).

0.50/–0.01

0.72/–0.01

0.72/–0.01

ns

T_{ISCCK_CE2}/ T_{ISCKC_CE2}

CE pin setup/hold with respect to CLKDIV
(for CE2).

–0.10/0.36

–0.10/0.40

–0.10/0.40

ns

Setup/Hold for Data Lines

T_{ISDCK_D}/ T_{ISCKD_D}

D pin setup/hold with respect to CLK.

–0.02/0.14

–0.02/0.17

–0.02/0.17

ns

T_{ISDCK_DDLY}/ T_{ISCKD_DDLY}

DDLY pin setup/hold with respect to CLK (using IDELAY).(1)

–0.02/0.14

–0.02/0.17

–0.02/0.17

ns

T_{ISDCK_D_DDR}/ T_{ISCKD_D_DDR}

D pin setup/hold with respect to CLK at
DDR mode.

–0.02/0.14

–0.02/0.17

–0.02/0.17

ns

T_{ISDCK_DDLY_DDR}/ T_{ISCKD_DDLY_DDR}

D pin setup/hold with respect to CLK at
DDR mode (using IDELAY).(1)

0.14/0.14

0.17/0.17

0.17/0.17

ns

Sequential Delays

T_{ISCKO_Q}

CLKDIV to out at Q pin.

0.54

0.66

0.66

ns

Propagation Delays

T_{ISDO_DO}

D input to DO output pin.

0.11

0.13

0.13

ns

Notes:

1.​Recorded at 0 tap value.