Table: Input Delay Measurement Methodology shows the test setup parameters used for measuring input delay.
I/O Standard Attribute | VL(1) | VH(1) | |||
|---|---|---|---|---|---|
LVCMOS, 1.2V | LVCMOS12 | 0.1 | 1.1 | 0.6 | – |
LVCMOS, 1.5V | LVCMOS15 | 0.1 | 1.4 | 0.75 | – |
LVCMOS, 1.8V | LVCMOS18 | 0.1 | 1.7 | 0.9 | – |
LVCMOS, 2.5V | LVCMOS25 | 0.1 | 2.4 | 1.25 | – |
LVCMOS, 3.3V | LVCMOS33 | 0.1 | 3.2 | 1.65 | – |
LVTTL, 3.3V | LVTTL | 0.1 | 3.2 | 1.65 | – |
MOBILE_DDR, 1.8V | MOBILE_DDR | 0.1 | 1.7 | 0.9 | – |
PCI33, 3.3V | PCI33_3 | 0.1 | 3.2 | 1.65 | – |
HSTL (high-speed transceiver logic), Class I, 1.2V | HSTL_I_12 | VREF – 0.5 | VREF + 0.5 | VREF | 0.60 |
HSTL, Class I & II, 1.5V | HSTL_I, HSTL_II | VREF – 0.65 | VREF + 0.65 | VREF | 0.75 |
HSTL, Class I & II, 1.8V | HSTL_I_18, HSTL_II_18 | VREF – 0.8 | VREF + 0.8 | VREF | 0.90 |
HSUL (high-speed unterminated logic), 1.2V | HSUL_12 | VREF – 0.5 | VREF + 0.5 | VREF | 0.60 |
SSTL (stub-terminated transceiver logic), 1.2V | SSTL12 | VREF – 0.5 | VREF + 0.5 | VREF | 0.60 |
SSTL, 1.35V | SSTL135, SSTL135_R | VREF – 0.575 | VREF + 0.575 | VREF | 0.675 |
SSTL, 1.5V | SSTL15, SSTL15_R | VREF – 0.65 | VREF + 0.65 | VREF | 0.75 |
SSTL, Class I & II, 1.8V | SSTL18_I, SSTL18_II | VREF – 0.8 | VREF + 0.8 | VREF | 0.90 |
DIFF_MOBILE_DDR, 1.8V | DIFF_MOBILE_DDR | 0.9 – 0.125 | 0.9 + 0.125 | 0(5) | – |
DIFF_HSTL, Class I, 1.2V | DIFF_HSTL_I_12 | 0.6 – 0.125 | 0.6 + 0.125 | 0(5) | – |
DIFF_HSTL, Class I & II,1.5V | DIFF_HSTL_I, DIFF_HSTL_II | 0.75 – 0.125 | 0.75 + 0.125 | 0(5) | – |
DIFF_HSTL, Class I & II, 1.8V | DIFF_HSTL_I_18, DIFF_HSTL_II_18 | 0.9 – 0.125 | 0.9 + 0.125 | 0(5) | – |
DIFF_HSUL, 1.2V | DIFF_HSUL_12 | 0.6 – 0.125 | 0.6 + 0.125 | 0(5) | – |
DIFF_SSTL135/ | DIFF_SSTL135, DIFF_SSTL135_R | 0.675 – 0.125 | 0.675 + 0.125 | 0(5) | – |
DIFF_SSTL15/ | DIFF_SSTL15, DIFF_SSTL15_R | 0.75 – 0.125 | 0.75 + 0.125 | 0(5) | – |
DIFF_SSTL18_I/ | DIFF_SSTL18_I, DIFF_SSTL18_II | 0.9 – 0.125 | 0.9 + 0.125 | 0(5) | – |
LVDS_25, 2.5V | LVDS_25 | 1.2 – 0.125 | 1.2 + 0.125 | 0(5) | – |
BLVDS_25, 2.5V | BLVDS_25 | 1.25 – 0.125 | 1.25 + 0.125 | 0(5) | – |
MINI_LVDS_25, 2.5V | MINI_LVDS_25 | 1.25 – 0.125 | 1.25 + 0.125 | 0(5) | – |
PPDS_25 | PPDS_25 | 1.25 – 0.125 | 1.25 + 0.125 | 0(5) | – |
RSDS_25 | RSDS_25 | 1.25 – 0.125 | 1.25 + 0.125 | 0(5) | – |
TMDS_33 | TMDS_33 | 3 – 0.125 | 3 + 0.125 | 0(5) | – |
Notes: 1.Input waveform switches between VL and VH. 2.Measurements are made at typical, minimum, and maximum VREF values. Reported delays reflect worst case of these measurements. VREF values listed are typical. 3.Input voltage level from which measurement starts. 4.This is an input voltage reference that bears no relation to the VREF / VMEAS parameters found in IBIS models and/or noted in This Figure. | |||||