Time Multiplexing the DSP58

Versal ACAP DSP Engine Architecture Manual (AM004)

Document ID
Release Date
1.2.1 English

The high-speed math elements in DSP58 enable you to use time multiplexing in DSP designs. Time multiplexing is the process of implementing more than one function within a single DSP58 at different instances of time. Time multiplexing can be done easily for designs with low sample rates. The calculation to determine the number of functions (N) that can be implemented in one single DSP58 is shown in the following equation.

Implementing a time-multiplexed design using DSP58 results in reduced resource usage and reduced power.

DSP58 contains the basic elements of classic FIR filters, a multiplier followed by an adder, delay, or pipeline registers, and the ability to cascade an input stream (B bus) and an output stream (P bus) without exiting to a general CLB slice.

Multichannel filtering can be viewed as time-multiplexed, single-channel filters. In a typical multichannel filtering scenario, multiple input channels are filtered using a separate digital filter for each channel. Due to the high performance of DSP58, a single digital filter can be used to filter multiple input channels. As an example, eight input channels can be handled by clocking the single filter with an 8x clock. This implementation uses 1/8th of the total resource as compared to implementing each channel separately.