Pre-Adder Used as a Multiplexer

Versal ACAP DSP Engine Architecture Manual (AM004)

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1.2.1 English

The pre-adder can be reused as a 2:1 multiplexer to select between the A[26:0] and D[26:0], useful for connecting ping-pong buffers implemented in the programmable logic (PL) memory. The idea is to make the pre-adder perform either A + 0, or 0 + D, where A receives data from the ping buffer and D receives data from the pong buffer. See the following figure. The following configurations are included.

  1. Configure AMULT to receive data from AD_DATA with AMULTSEL.
  2. Configure the pre-adder to select A2A1 with PREADDINSEL because B is narrower than A.
  3. Configure the pre-adder to the add mode with INMODE[3] so that the pre-adder to compute either A + 0, or 0 + D.
  4. Connect the A-D multiplexer select pin from the PL to both INMODE[1]A and INMODE[2]. When these signals are both 0, A is selected to go to AMULT, the input of the vector multiplier; when they are both 1, D is selected.
Note: The pre-adder must not be used for selecting between B and D because B only has 24 bits whereas D has 27 bits.
Figure 1. Hierarchical View of the DSP58 Input Registers and Pre-Adder as a Multiplexer