Legacy IP Core Support - 2024.1 English - UG911

ISE to Vivado Design Suite Migration Guide (UG911)
Document ID
UG911
Release Date
2024-05-30
Version
2024.1 English

AMD recommends that you move to the new Vivado debug IP cores.

Important: The ChipScope Pro debug IP core XCO files are not compatible with the Vivado tools. Do not add an XCO file to a Vivado project.
  • In a Vivado project, add the following to a project:
    • The NGC file generated from the core
    • The XDC file
    • The synthesis template file (.V or .VHD, depending on the HDL language)
  • Set the USED_IN_SYNTHESIS property to false for the ChipScope debug core XDC files.
  • Set the SCOPED_TO_REF property to the appropriate cell name.

    The following is an example for a design that contains the icon_v1_06a, ila_v1_05a, and the vio_v1_05a ChipScope Pro debug IP cores:

    set_property USED_IN_SYNTHESIS false [get_files icon_v1_06a.xdc ila_v1_05a.xdc vio_v1_05a.xdc]

    set_property SCOPED_TO_REF {ila_v1_05a} [get_files ila_v1_05a.xdc]

  • The legacy ChipScope Pro debug IP cores, listed in the following table, require the ChipScope Pro Analyzer tool for interaction during runtime debugging and are NOT compatible with the Vivado hardware manager.
    Table 1. Legacy Cores, Compatibility, and New Vivado Debug IP Cores
    Legacy ChipScope Pro Debug IP Core and Version Compatible with Vivado 2013.1 (and later) New Compatible Vivado Debug IP Core
    Agilent Trace Core 2 (ATC2), v1.05a No N/A
    AXI ChipScope Monitor, v3.05a Yes N/A
    Integrated Bit Error Ratio Tester (IBERT) 7 Series GTH, v2.01a No Integrated Bit Error Ratio Tester (IBERT) 7 Series GTH, v3.0 (or later)
    Integrated Bit Error Ratio Tester (IBERT) 7 Series GTP, v2.00a No Integrated Bit Error Ratio Tester (IBERT) 7 Series GTP, v3.0 (or later)
    Integrated Bit Error Ratio Tester (IBERT) 7 Series GTX, v2.02a No Integrated Bit Error Ratio Tester (IBERT) 7 Series GTX, v3.0 (or later)
    Integrated Bit Error Ratio Tester (IBERT) Spartan6 GTP, v2.02a No N/A
    Integrated Bit Error Ratio Tester (IBERT) Virtex5 GTX, v2.01a No N/A
    Integrated Bit Error Ratio Tester (IBERT) Virtex6 GTX, v2.03a No N/A
    Integrated Bit Error Ratio Tester (IBERT) Virtex6 GTH, v2.06a No N/A
    Integrated Controller (ICON), v1.06a Yes N/A
    Integrated Logic Analyzer (ILA), v1.05a Yes Integrated Logic Analyzer (ILA), v2.0 (or later)
    Virtual Input/Output (VIO), v1.05a Yes Virtual I/O (VIO), v2.0 (or later)